Increasing demand for power saving in computer systems has made techniques like Dynamic Frequency Scaling (DFS) and Dynamic Voltage and Frequency Scaling (DVFS) highly popular. These techniques work by lowering the frequency of the clock signal provided to a processor, and by consequence allow for the voltage provided to the processor to be lowered.
The present disclosure will be described with reference to the accompanying drawings. Generally, the drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.